Summary
This investigation report reaches a red-level verdict of substantive academic integrity concerns in the paper published in Electronics (MDPI). Five issues are documented. (1) Timeline impossibility: the manuscript was received on 28 October 2025 yet cites at least four references dated 2026 (e.g., Expert Syst. Appl. 2026, 297, 129489; Adv. Eng. Inform. 2026, 69 Pt B, 103931), which cannot legally exist at submission. (2) Inflated SOTA claims built on trivial gains: in MVTec Pixel-AUPRO (Table 5), the proposed model scores 87.0% versus Crane's 88.1%, yet the abstract claims comprehensive SOTA performance. Reported improvements are as small as 0.1% (e.g., BTAD 96.3→96.4%; KSDD 94.5→94.6%). (3) No error bars, standard deviations, or confidence intervals are reported in any of Tables 1–7. (4) Implausible parameter count: claiming a dual-backbone of CLIP ViT-L/14 + DINOv2 ViT-L totals only 436 M parameters, with visual encoders at 312.7 M, which is less than a single ViT-L. (5) Unusually fast turnaround: revised 24 November 2025, accepted 26 November 2025 (2 days). Limitations: image figures (9–12) were not pixel-verified. Overall confidence is high on textual evidence; final determination requires institutional review.
Verdict
🔴 Substantive concerns — multiple serious integrity issues identified, including forward-dated references and inconsistent SOTA reporting. Confidence: high for textual findings; image-level verification not performed.
Key findings
- Forward-dated references (timeline conflict): Submission date 28 October 2025; at least four cited references bear 2026 publication years.
- Inflated SOTA claims despite worse performance on a core dataset: Abstract states comprehensive SOTA, but the model underperforms Crane on MVTec Pixel-AUPRO (87.0% vs. 88.1%, Table 5).
- Trivial-margin improvements without statistical reporting: Gains of ~0.1–0.2% on BTAD and KSDD; no standard deviations or confidence intervals in any table.
- Implausible parameter accounting: Dual ViT-L backbones (~608 M expected) reported as ~436 M total; visual encoders stated as 312.7 M, below a single ViT-L.
- Abnormally rapid acceptance: Received 28 October 2025; revised 24 November 2025; accepted 26 November 2025 (2 days).
Evidence highlights
- DOI: 10.3390/electronics14244785
- Received: 2025-10-28; Revised: 2025-11-24; Accepted: 2025-11-26; Published: 2025-12-05
- Reference 1:
Expert Syst. Appl. 2026, 297, 129489
- Reference 3:
Expert Syst. Appl. 2026, 296, 128965
- Reference 6:
Expert Syst. Appl. 2026, 296, 128995
- Reference 7:
Adv. Eng. Inform. 2026, 69 Pt B, 103931
- Table 5, MVTec Pixel-AUPRO: proposed model 87.0% vs. Crane 88.1%
- Table 1 (BTAD): 96.3% → 96.4%
- Table 2 (KSDD): 94.5% → 94.6%
- Section 4.1.3: total ~436 M parameters; visual encoders ~312.7 M (stated)
Notes
- Figures 9–12 (anomaly heatmaps) were not pixel-verified; image-based manipulation cannot be ruled in or out from the available text.
- Reference list appears to contain entries that did not exist at the time of submission; this constitutes a verifiable factual error regardless of intent.
- Absence of statistical dispersion measures (std/confidence intervals) makes the claimed SOTA gains indistinguishable from random-seed variance.
- The parameter-count inconsistency may indicate undeclared use of smaller backbones (e.g., ViT-B or ViT-S), which would invalidate baseline comparisons.
- All findings derive from the user-supplied PDF text extraction; institutional investigation is required for a final determination.
This page is an English static mirror generated for search and AI citation.
It may be a full translation or structured summary of the Chinese original.
Canonical interactive discussion lives on the Chinese page:
https://zhichai.net/report/geng_geng_6a1e3647c71fe9.24315573