Silicon Awakening: How the Open Source Community Is Challenging the GPU Fortress

*An English-language summary of a Chinese-language forum post on the open source GPU ecosystem.*

Key points

• Unlike CPUs (where RISC-V and OpenPOWER brought openness), GPU designs have been locked down for thirty years by high parallelism, complex graphics pipelines, and dense patent walls. Slowing Moore's Law and the rise of domain-specific architectures (DSA) are now cracking this fortress.
• GitHub now hosts projects spanning RTL hardware descriptions to cycle-accurate simulators, marking the start of GPGPU design democratization.

The RISC-V convergence

The most visible trend is convergence on RISC-V, whose modular ISA allows custom extensions for SIMT execution.

Vortex (Georgia Tech)

• Full-stack, parameterizable GPGPU ecosystem: RTL to compiler toolchain, using minimal RISC-V ISA extensions.
• Configurable core/warp/thread counts; per-core ALU, FPU, LSU, and SFU counts — from AI accelerator to throughput-oriented GPU.
• ISA: RV32IMAF/RV64IMAFD plus the ZICOND conditional-branch extension; Vortex 2.0 adds INT4 for ML inference throughput.
• Memory: optional L1/L2/L3 caches plus local shared memory (like NVIDIA shared memory) for low-latency warp-level data exchange; the AFU command processor now exposes multiple memory channels (8 on Intel Stratix 10, 2 on Arria 10).
• SIMT execution: round-robin warp scheduling to hide latency; divergence handled via predicate registers and a split/join stack, with new split_n/pred_n instructions reducing area overhead.
• Skybox extension: first open source hardware with full Vulkan API support, adding fixed-function rasterizer, texture sampling (bilinear filtering, address wrap modes), and output merger (depth test, blending). On Altera Stratix 10, a 32-core/512-thread configuration runs at 230 MHz with a 3.7 GPixels/s fill rate.

RV64X

• Defines a fused graphics ISA embedding vector graphics instructions into standard RISC-V scalar streams, with pixel, texture, and Z-buffer data types and transcendentals — aiming to eliminate CPU-GPU data transfer overhead for low-power embedded systems.
• Currently mostly spec and reference implementations; not yet a widely deployed RTL codebase.

Classic and alternative projects

• MIAOW (UW-Madison): open RTL implementation of one AMD Southern Islands (Tahiti) compute unit; runs unmodified OpenCL kernels compiled for Radeon HD 7000. Compute-only — no graphics pipeline, memory controller, or display controller. Includes regression/benchmark suites from AMD APP SDK; used for scheduling, fault-injection, and RTL timing research.
• NyuziProcessor: many-core hybrid vector/scalar design (Larrabee-like) with fine-grained round-robin hardware multithreading, MOESI-like hardware cache coherence, and a rich software stack (xv6 port, LLVM backend, LLDB support, vector float SIMD, predication).
• Libre-SOC: fully open hybrid CPU-VPU-GPU on the OpenPOWER ISA with Cray-style vector extensions; written in nMigen/Amaranth (Python-based HDL). NLnet-funded, taped out at TSMC 180nm; faced DDR3 controller challenges on Lattice ECP5 when replacing closed IP with open controllers (gram).

The simulator ecosystem

• GPGPU-Sim: the most-cited cycle-accurate NVIDIA GPU simulator (Fermi–Turing); runs CUDA/OpenCL binaries via PTX/SASS; ecosystem includes AerialVision (visualization), GPUWattch (power), Accel-Sim + NVBit SASS traces (v4.0), and Tensor Core modeling.
• MGPUSim/Akita: Go-written multi-GPU simulator using goroutines; models interconnects (xGMI, NVLink) and cross-GPU coherence.
• Gem5-GPU / GPUFS: full-system simulation booting a real Linux kernel to study virtualization, driver overhead, and unified memory; now supports the modern VEGA_X85 model and Ubuntu 24.04 builds.
• MacSim: trace-driven cycle-level heterogeneous (x86, ARM64, PTX, Intel GEN) simulator with IRIS interconnect and McPAT power models for PPA analysis.

Software stack and drivers

• Panfrost: open driver for ARM Mali (Midgard/Bifrost; Valhall in progress), reverse-engineered from command streams and register dumps, merged into Mesa. Supports T760/T860 and G31/G52/G72/G76; passes OpenGL ES 3.1 conformance on Mali-G52, sometimes more stable than vendor blobs.
• Compilers: nearly all projects rely on LLVM; Vortex maintains a custom LLVM branch and integrates PoCL (Portable Computing Language), with Vortex 2.0 adding Newlib support and JIT improvements.

Physical implementation

• FPGA targets reflect project positioning: Vortex on Arria 10 / Stratix 10 / Xilinx Alveo / Versal with HBM (200 MHz on Stratix 10); Nyuzi on Cyclone IV for education; Libre-SOC on Lattice ECP5 with a fully open toolchain (Yosys/Nextpnr).
• Key bottlenecks: timing closure (pipeline depth trade-offs) and memory bandwidth limited by hard PHY controllers; open DDR controller bring-up is notoriously difficult.

Educational minimalism

• Tiny-GPU: minimal Verilog exposing the core SIMT loop (fetch, warp scheduling, execute) and the dispatcher's block-to-core distribution.
• Smol-GPU: RV32I-based teaching GPU with multi-warp support and hardware branch divergence handling — a gentle introduction to SIMT stacks.

Conclusion

The open source GPU ecosystem is transitioning from scattered experiments to RISC-V-centered standardization. Vortex proves the ISA's viability for GPGPU; Skybox narrows the compute-graphics gap; simulators and FPGA prototypes form a strong verification loop; and Panfrost shows open drivers are a viable path to breaking vendor monopolies. Adapting a standard Mesa driver stack will be the route for open GPUs into the Linux ecosystem — and now is an ideal time for researchers to contribute to microarchitecture, compilers, or system integration.

Key references

1. Vortex: Extending the RISC-V ISA for GPGPU and 3D-Graphics Research. arXiv:2110.10857, 2021. 2. MIAOW: An Open Source RTL Implementation of a GPGPU. Hot Chips 27, 2015. 3. NyuziProcessor: GPGPU Microprocessor Architecture (GitHub project docs). 4. GPGPU-Sim: A Detailed Simulation Model of Contemporary NVIDIA GPUs (GitHub). 5. From Panfrost to Production: A Tale of Open Source Graphics. Collabora blog, 2020.