Opening: Why Would a Consumer Electronics Company "Betray" Its Ancestry?
On April 22, 2026, Anker Innovations released a chip called Thus™. What makes it interesting is not raw speed—though Anker claims a "150x AI peak compute improvement"—but its technology path: Computing-in-Memory (CIM), a concept previously confined to academic papers and labs, now turned into a mass-producible commercial chip by a consumer electronics company.
The motivation was almost forced: Anker's audio team trained an excellent end-to-end noise-cancellation model with millions of parameters, but on traditional Bluetooth chips, earbud battery life dropped below one hour. The root cause is the von Neumann architecture's power bottleneck—over 90% of energy is consumed moving data, not computing. So Anker made a decision against its "ancestry": stop optimizing the old architecture and rebuild from scratch.
The Von Neumann Bottleneck: An Eighty-Year-Old Performance Assassin
The von Neumann architecture (1945) rests on a fatal assumption: compute and memory are separate. At low frequencies and low data volumes this is fine, but when neural network inference dominates, models must be fetched from memory on every pass. For million-parameter end-to-end audio models, data is shuttled between memory and compute units hundreds of times per second.
Result: over 90% of energy goes to data movement, not actual computation. This is architectural waste, not a "too slow" problem—like hiring a top chef who spends 90% of the time hauling ingredients from the warehouse. Moore's Law cannot fix it: it shrinks transistors but doesn't change the nature of "moving." Processor performance has improved ~55% annually over two decades while memory improved only ~10%. At 7nm, data movement consumes up to 35pJ/bit.
Computing-in-Memory: Three Paths, From Conservative to Radical
1. Near-Memory Computing (NMC)
Compute units and memory packaged in the same chip or 2.5D/3D package. Data movement shrinks from centimeters to micrometers. HBM is the representative example; the lowest barrier, already mass-produced.Essence: move data closer, but still move it.
2. Processing-in-Memory (PIM)
Add compute to the memory chip's peripheral circuitry—e.g., a MAC unit beside the Sense Amplifier in DRAM/SRAM—so data is processed right after being read, without traveling to a CPU.Essence: compute at the memory's doorstep.
3. Computing-in-Memory (CIM)
The most radical path: execute matrix operations directly inside the memory array, using the physical properties of memory cells (current summation, voltage accumulation) for analog computation. One read operation completes a row of multiply-accumulates.Essence: computation happens where the data lives. No movement.
Anker's Thus™ follows the CIM path, based on NOR Flash. Why NOR Flash? Audio model weights are largely fixed at inference time, matching NOR Flash's non-volatility and low power. NOR Flash cells can also perform analog multiply-accumulate via their cell current, avoiding complex ADCs—one of CIM's biggest power traps.
Thus™ Chip: Specs and Engineering Trade-offs
| Spec | Detail | |------|--------| | Technology | NOR Flash CIM | | Model support | Native 4M parameters | | Compute gain | Up to 150x AI peak compute vs. traditional Bluetooth chips | | Use case | Flagship earbuds, end-to-end noise cancellation / voice enhancement | | Development | Started 2023, launched 2026 (three years) | | Partnership | First gen co-developed, next gen fully in-house |
The 150x is about "effective compute," not transistor count: energy previously wasted on data movement is redirected to computation under the same power budget.
Why earbuds? CEO Yang Meng's answer is direct: the highest-frequency user pain point is being heard clearly in a 100dB environment. Traditional pipelined DSP (beamforming → echo cancellation → noise suppression → voice enhancement) solves local problems but can't understand sound holistically. End-to-end large models can—but traditional chips can't run them.
The name: from the Buddhist sutra opening "Thus have I heard"—an authentic, unaltered presentation. With Thus, earbuds faithfully render the soundscape and strip away noise to reveal the true human voice.
From Audio to Embodied AI: Anker's Bigger Ambition
Thus™ opens a three-year chip technology platform under a "1+X+N" strategy:
- 1 home super brain: a locally deployed, offline-capable edge AI model; data stays home
- X humanoid robots: embodied intelligence in the 3D manipulation phase
- N smart devices: robot vacuums and lawnmowers already in mass production
- Anker Thus™: industry's first commercial million-parameter-class CIM chip for consumer edge scenarios
- ISSCC 2026: Tsinghua University + Huawei + ByteDance joint team presented a 28nm hybrid CiM chip for recommender-system inference: 66x QPS and 181x QPS/W improvements
- Actions Technology (Juxin): SRAM-based MMSCIM chip—98% power reduction and 44x energy efficiency in noise cancellation
- MicroNano Core: 3D-CIM architecture, 4x compute density, 10x lower power
- Anker Innovations technology briefing (2026-04-22)
- Leiphone: https://www.leiphone.com/category/chips/A9F0pchEVb3Y4RyK.html
- The Paper: https://m.thepaper.cn/newsDetail_forward_33035849
- Sina Finance: https://finance.sina.com.cn/jjxw/2026-04-22/doc-inhvkyvy4232499.shtml
- CIM chip development status and trends, Scientia Sinica SSI-2023-0311
- ISSCC 2026 hybrid CiM chip paper
Three-stage evolution: planar movement (mass-produced) → 3D movement (in progress, security robot dogs) → 3D manipulation (R&D, humanoid robots).
The perceive → plan → execute chain: Thus starts as an "auditory neuron," extending to vision and touch; the home super brain handles global orchestration via distributed bus, atomic services, and distributed scheduling; robots execute physical actions.
Anker's 2025 R&D spend was RMB 2.893 billion, up 37.2% YoY. Yang Meng: "Investment in advanced fields has virtually no cap."
Industry Landscape: 2026 as CIM's Mass-Production Year
Three memory media coexist:
| Media | Strengths | Weaknesses | Fit | |-------|-----------|------------|-----| | SRAM | Fast, unlimited reads/writes, mature process | Low density, large area | Low-power edge AI | | NOR Flash | Non-volatile, low power, analog cell current | Limited write endurance, medium density | Fixed-weight inference | | RRAM/MRAM | High density, low read power | Immature process, limited writes | Long-term potential |
The ISSCC 2026 numbers matter: they show CIM moving from lab benchmarks to real-world inference workloads—from academic concept to engineering deployment.
Challenges and Limitations
CIM is not a silver bullet:
1. Precision vs. analog computing: analog computation is inherently less precise. Acceptable for perception tasks like audio; potentially inadequate for financial or scientific computing. 2. Write bottleneck: NOR Flash and RRAM have limited write endurance. Frequent model updates (online learning) erode CIM's advantages. Anker's fixed-weight inference scenario sidesteps this. 3. Immature EDA tooling: design automation for CIM lags far behind digital circuits—logic synthesis through verification must be rebuilt, lengthening design cycles and raising costs. 4. Ecosystem compatibility: CIM won't replace GPUs/NPUs; near-term it's an inference offload accelerator, mid-term it may merge via chiplets, long-term it could anchor new compute clusters.
Who Should Care?
Worth watching: edge AI developers (TWS earbuds, smart glasses, wearables); low-power embedded designers; technical decision-makers tracking post-Moore architecture innovation; consumer electronics strategy teams.
Not yet applicable: high-precision scientific/financial computing; online-learning systems with frequent model updates; applications already within their power budget.
Conclusion
The significance of Thus™ lies not in the "150x" number but in proving that CIM can be engineered, mass-produced, and productized for consumer edge scenarios. When a consumer electronics company with RMB 30.5 billion in annual revenue spends three years and near-unlimited R&D resources on an "ancestry-betraying" chip, the von Neumann bottleneck has shifted from an academic problem to a business problem.
Deeper still: Anker chose not a faster chip but a different computing paradigm—from divide-and-conquer to end-to-end, from moving data to computing in place, from optimizing the old architecture to starting over. If this paradigm shift succeeds in audio, it will spread quickly to vision, touch, and multimodal sensing. Thus is an "auditory neuron" today; tomorrow it could be perceptual infrastructure.
The post-Moore architecture race has just begun.
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