Anker Thus Chip Deep Dive: How Computing-in-Memory Betrays the von Neumann Architecture

Forum topic · 小凯 · 2026-04-30

Summary

On April 22, 2026, Anker Innovations unveiled Thus, a commercial Computing-in-Memory (CIM) chip built on NOR Flash, claiming up to 150x higher peak AI compute than traditional Bluetooth audio chips. The chip addresses the von Neumann bottleneck, where over 90% of energy is spent moving data between memory and compute units rather than computing—making it impossible to run megapixel-scale end-to-end noise-reduction models on earbuds. This article explains the three CIM technology routes (near-memory, processing-in-memory, and true in-memory computing), details Thus's specifications including native support for 4M-parameter models, and situates it in the broader 2026 'CIM mass production year' landscape alongside Tsinghua/Huawei/ByteDance's ISSCC 2026 hybrid CiM chip (66x QPS, 181x energy-efficiency gains), Juxin's SRAM-based MMSCIM, and Micro-Nano Core's 3D-CIM. It also covers Anker's '1+X+N' roadmap toward embodied intelligence, the technology's limitations (analog precision, write endurance, immature EDA tooling), and who should pay attention.

Key points

Anker Innovations launched Thus™ on April 22, 2026 — billed as the industry's first commercial megascale CIM chip, developed over three years (2023–2026), debuting in flagship earbuds for end-to-end noise reduction and voice enhancement. First generation was co-developed; the next will be fully in-house.
The motivation was forced: Anker's audio team built a high-quality end-to-end denoising model with megascale parameters, but on traditional Bluetooth chips battery life fell below one hour. Root cause: the von Neumann architecture's bottleneck — over 90% of energy is consumed by data movement, not computation. At 7nm, data movement costs up to 35 pJ/bit, and the processor-memory performance gap keeps widening (55% vs 10% annual improvement).
CIM spectrum, from conservative to radical:
Near-Memory Computing (NMC): compute and memory in one package (e.g., HBM). Still moves data, just shorter distances.
Processing-in-Memory (PIM): compute units added near DRAM/SRAM sense amplifiers.
Computing-in-Memory (CIM): matrix operations executed inside the memory array itself using physical cell properties (current summation, voltage accumulation) — the route Thus takes.
Why NOR Flash CIM: audio inference weights are largely fixed, matching NOR Flash's non-volatility and low power, and its cell currents enable analog multiply-accumulate without heavy ADC overhead — a common CIM power trap.

Thus™ specifications

| Spec | Value | |------|-------| | Route | NOR Flash CIM | | Model support | Native 4M parameters | | Compute gain | Up to 150x peak AI compute vs traditional Bluetooth chips | | Use case | Flagship earbuds, end-to-end denoising / voice enhancement | | Timeline | 2023 start, 2026 launch |

The 150x figure reflects unlocked "effective compute" — energy previously wasted on data movement is redirected to actual computation, not more transistors. The name comes from the Buddhist sutra opening "Thus have I heard" (如是我闻), meaning faithful, unadulterated presentation of sound.

Industry landscape: 2026 as CIM's mass-production year

Anker Thus™: first commercial megascale CIM chip for consumer edge devices
ISSCC 2026: Tsinghua + Huawei + ByteDance demonstrated a 28nm hybrid CiM chip for recommender inference — 66x QPS, 181x QPS/W
Juxin (炬芯): SRAM-based MMSCIM — 98% power reduction in denoising, 44x energy efficiency
Micro-Nano Core (微纳核芯): 3D-CIM — 4x compute density, 10x lower power

Media trade-offs: SRAM is fast with unlimited endurance but dense-poor; NOR Flash is non-volatile and low-power but has limited writes; RRAM/MRAM offer density potential but immature processes.

Limitations

1. Analog precision: CIM accuracy is inherently below digital compute — acceptable for perception tasks, risky for financial/scientific workloads. 2. Write endurance: NOR Flash/RRAM limited writes weaken CIM for frequently updated models; Anker's fixed-weight inference sidesteps this. 3. Immature EDA toolchain: design, verification, and synthesis flows must be rebuilt, raising cost and cycle time. 4. Ecosystem fit: CIM complements rather than replaces GPUs/NPUs — near-term inference offload, mid-term Chiplet integration, long-term possibly new compute clusters.

Anker's bigger ambition

A "1+X+N" strategy: one local home AI "super brain" (works offline, data stays home), X humanoid robots (3D manipulation), and N smart devices. Evolution path: planar movement (robot vacuums/lawn mowers, shipping) → 3D movement (security robot dogs, in progress) → 3D manipulation (humanoids, in R&D). Perception starts with Thus as an "auditory neuron," extending toward vision and touch. Anker's 2025 R&D spend was RMB 2.893 billion, up 37.2% YoY; CEO Yang Meng said investment in advanced areas has "almost no ceiling."

Conclusion

Thus™ matters less for the 150x number than as proof that CIM can be engineered, mass-produced, and productized in consumer edge devices. It signals a paradigm shift — from divide-and-conquer pipelines to end-to-end models, from moving data to computing in place. If validated in audio, expect rapid diffusion to vision, touch, and multimodal sensing. Post-Moore architecture competition is just beginning.

Sources: Anker technical briefing (2026-04-22); Leiphone; The Paper; Sina Finance; CIM status review in Science China (SSI-2023-0311); ISSCC 2026 hybrid CiM paper.