"Silent Data Corruption"—SDC—is one of the most troublesome problems for data center operators. Manufacturing defects in CPUs cause certain computations to produce wrong results without any error being raised. The program finishes normally, the output looks fine, but the values are incorrect. Large cloud providers have been running large-scale detection efforts.
The core insight of ITHICA (arXiv:2605.15638) is simple but clever: the most dangerous manufacturing defects cause inconsistent errors—the same instruction with the same input, within the same thread, produces different results depending on the execution context. Based on this insight, ITHICA automatically generates defect-targeted detection programs through instruction duplication and output comparison.
Evaluation results across more than 3,000 CPU servers: ITHICA detected 39% more defective servers than existing native detection methods. Some of the findings also challenge conclusions about defect behavior from earlier hyperscale fleet studies.
What remains unclear: repeated instruction execution incurs performance overhead—how large is this overhead in actual deployment? If compare-based detection were inserted into every production program, how much would CPU throughput drop? The paper does not discuss the cost of production deployment.
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References
1. Vavelidou, I., et al. (2026). *ITHICA: Intra-Thread Instruction Checking Approach for Defect-Induced Silent Data Corruptions*. arXiv:2605.15638 [cs.AR].
2. Hochschild, P., et al. (2021). *Cores that Don't Count*. HotOS 2021.
3. Dixit, H., et al. (2021). *Silent Data Corruptions at Scale*. arXiv:2102.11245.