I. The Problem Statement
On May 23, DeepSeek made a market-jolting decision: a permanent 75% reduction in V4-Pro API pricing. Cached-input pricing dropped to $0.003625 per million tokens—one quarter of the original price—with no time limit. Four pricing adjustments within one month, escalating from launch discounts to permanent pricing, mark an unusually aggressive cadence.
In parallel, capital-side news reports a $10B+ funding round at a valuation exceeding $20B, with Tencent and Alibaba in talks and state-backed channels reportedly oversubscribed.
On the surface, this looks like the classic "technology leadership + capital backing" narrative. But extending the timeline over two years, from V2's MLA to V3.2's DSA and V4's CSA/HCA, reveals a clear technical throughline: DeepSeek's most consistent strategy is not building video models or super-apps, but compressing the unit cost of long-context inference to the lowest possible level.
This raises a core question: when an AI company chooses "cost compression" as its primary strategy, what is it actually competing for?
II. Technical Breakdown: The Compression Philosophy from MLA to CSA/HCA
2.1 MLA: The First KV-Cache Revolution
V2's Multi-head Latent Attention addressed a core Transformer pain point—KV-cache memory explosion. In traditional multi-head attention, each head maintains independent K and V matrices, and memory grows linearly with sequence length. MLA compresses the KV cache into a 512-dimensional latent vector via low-rank decomposition, supporting long sequences at near-constant memory cost.
This was the starting point of DeepSeek's technical roadmap: trade compression for space, trade space for efficiency.
2.2 From DSA to CSA/HCA: Layered Refinement of Compression
V3.2 introduced DeepSeek Sparse Attention (DSA), adding selective computation to long sequences—not every token needs to interact with every historical token, only the critical ones. V4 advanced this further, designing a hybrid architecture combining Compressed Sparse Attention (CSA) and Heavily Compressed Attention (HCA).
CSA's operational logic: first compress every m tokens' KV cache into a single entry, then apply sparse attention so each query token attends only to k compressed entries. HCA is more aggressive, using a larger m' to heavily aggregate large volumes of token information while preserving global awareness. The two alternate: HCA captures the macro picture, CSA captures critical detail.
The engineering implication is unambiguous: at 1M-token context, V4-Pro's per-token inference FLOPs drop to 27% of V3.2, and KV cache usage drops to 10%. Million-token context is no longer an expensive add-on but default infrastructure.
2.3 MoE + Engram: Dual Sparse Axes in Coordination
V4's other core innovation is the Engram conditional memory module. Traditional MoE achieves "compute sparsification"—activating only a subset of experts per pass. Engram achieves "memory sparsification": storing entity names, fixed formulas, and other static knowledge in scalable lookup tables, retrieved in O(1) time.
The deeper significance lies in *separation of lookup from computation*. MoE routing depends on runtime hidden states—dynamic and unpredictable. Engram's retrieval index is determined solely by the input token sequence—fully deterministic. This difference yields a qualitative engineering shift: a 100B-parameter Engram embedding table can be offloaded to inexpensive CPU memory, with GPU compute on preceding layers while PCIe asynchronously prefetches required memory for subsequent layers, fully overlapping communication with computation. Experimental data shows that even with a 100B-parameter Engram table attached, H800 inference throughput drops by less than 3%.
The DeepSeek team also discovered a U-shaped scaling law: system performance peaks when 75%–80% of total sparse parameters are allocated to MoE and 20%–25% to Engram. This implies a golden ratio between static memory and dynamic reasoning, not a simple zero-sum tradeoff.
2.4 TileLang: A Hardware-Agnostic Operator Abstraction Layer
If CSA/HCA and Engram address "how the model saves," TileLang addresses "how the hardware runs."
TileLang is DeepSeek's self-developed domain-specific language (DSL) for writing high-performance GPU kernels. Developers describe computation in a Python style, and the compiler auto-generates optimized backend code—CUDA, CANN, or OpenCL. FlashAttention kernels shrank from 500+ lines of CUDA to 80 lines of TileLang, with equal or superior performance.
V4's operator layer was entirely rewritten in TileLang. This means the same code runs on Nvidia H100 and compiles on Huawei Ascend 950PR. After DeepSeek open-sourced TileLang, Huawei Ascend, Cambricon, and MetaX all completed Day-1 adaptation.
The strategic value of TileLang: it shifts operator development from "hardware-locked" to "algorithm-abstracted." CUDA's moat has never been the technology itself, but developer habits and ecosystem lock-in. TileLang provides a cross-hardware migration path, freeing model vendors from rewriting operator libraries for each new chip.
III. Pricing Strategy: Not a Price War, But a Standard War
3.1 The Mathematical Meaning of Permanent Cuts
V4-Pro's new pricing structure deserves line-by-line dissection:
| Billing Item | Original ($/M tokens) | Permanent Price | Cut | |---|---|---|---| | Cached input | $0.0145 | $0.003625 | 75% | | Uncached input | $1.74 | $0.435 | 75% | | Output | $3.48 | $0.87 | 75% |
Versus competitors: GPT-5.5 input is priced at $5.00/M tokens (cached: $0.50). DeepSeek's cached price is only 0.7% of GPT-5.5. This is not "cheaper"—it is a two-orders-of-magnitude gap.
The keyword is *permanent*. Time-limited discounts are marketing; permanent pricing is an industry-standard declaration. DeepSeek is asserting: flagship inference with million-token context is worth this price. Any latecomer pricing higher must justify a 10x+ cost gap with demonstrable added value.
3.2 The Economics of Cache Hits
DeepSeek deliberately widened the price gap between cache hits and misses to 50x. The business logic: agent scenarios, multi-turn dialogue, and code completion all naturally have high hit rates—system prompts, repo context, and conversation history are all reusable. Every 10% increase in hit rate substantially lowers actual cost.
This makes DeepSeek's pricing extremely agent-friendly. When competitors charge on full input, DeepSeek uses caching to push marginal cost on high-frequency calls toward zero. This is not a price war but a redefinition of the API economy's billing paradigm.
IV. Ecosystem Extrapolation: A Breakthrough for the Non-CUDA Camp
4.1 "Day 0" Resonance Across Chinese Chips
On April 24, the day of V4's release, eight Chinese AI chip vendors simultaneously announced Day-0 adaptation: Huawei Ascend, Cambricon, Moore Threads, Hygon DCU, MetaX, Kunlun, Pingtouge Zhenwu, and Iluvatar CoreX. This was not coordinated PR—it reflected the fact that software stacks, inference frameworks, and underlying operators had already cleared production paths before launch.
A deeper signal: DeepSeek prioritized early access for Chinese chip vendors; Nvidia and AMD did not receive preview builds. This "reverse prioritization" breaks industry convention. The strategic intent is clear: position its own model architecture and toolchain as the preferred adaptation target for the non-CUDA camp.
4.2 Data Validation on Ascend 950PR
Huawei's official benchmarks show Ascend 950PR delivers 4700 TPS decode throughput per card on V4-Pro (TPOT ~20ms) and 1600 TPS on V4-Flash (TPOT ~10ms). Third-party testing shows that, after deep optimization, V4 inference performance on Ascend 950PR reaches 2.87x that of Nvidia H20.
On cost structure, a 100-card cluster: Nvidia H20 bare cards ~10M RMB + server hosts 2.86M RMB + racks, totaling ~15M RMB. An equivalent Ascend 950PR solution runs just over 10M RMB. Considering per-card power (Ascend 950PR 600W vs. H20 350W) and the ~65% lower power per unit compute, and that one Ascend 950PR equals 2.2–2.8x H20 throughput, total infrastructure savings with the Ascend solution could reach 60%–70%.
This means DeepSeek's price-cut room does not come from subsidies but from structural hardware cost reduction. When a model is deeply adapted for domestic chips, the inference cost curve gains a downward channel independent of Nvidia's pricing.
4.3 The Shift in Ecosystem Bargaining Power
Traditional AI value chains follow a "chip defines model" logic: Nvidia launches a new GPU, model vendors adapt, cloud vendors procure. DeepSeek is attempting to invert this—"model defines chip."
When DeepSeek-V4 becomes the first trillion-parameter model with full-stack validation on both Nvidia and Huawei Ascend, and open-source weights allow anyone to deploy locally, chip vendors' competitive advantage shifts from "can it run CUDA" to "can it run DeepSeek efficiently." TileLang further lowers migration friction: algorithm researchers describe attention in 80 lines of Python, and the compiler auto-generates Ascend-optimized kernels.
This is a fundamental transfer of ecosystem bargaining power. Huawei Ascend and Cambricon historically faced a bind: hardware performance near Nvidia, but no killer app to prove commercial value. DeepSeek-V4 supplies that proof—open-source, free, locally deployable.
V. Strategic Assessment: Three Possible Endgames
5.1 Optimistic Path: An "Android Moment" for Chinese AI
If DeepSeek's model architecture (CSA/HCA + Engram + MoE) and toolchain (TileLang + DeepGEMM) become the de facto standard for the non-CUDA camp, it could trigger an Android-like reshaping of the mobile-chip ecosystem:
- Chinese chip vendors gain a killer-app endorsement, R&D investment achieves commercial closure
- Cloud vendors increase procurement of Chinese chips, scale effects reduce unit cost
- Developers write cross-hardware operators in TileLang, further eroding CUDA lock-in
- Inference cost continues falling, agent applications explode, demand feeds back into supply
- DeepSeek-V4 Technical Report (covering CSA/HCA hybrid attention, Engram module, and TileLang operator implementation)
- TileLang: A DSL for High-Performance Kernel Development
- Engram: Conditional Memory via Scalable Lookup (DeepSeek-AI & Peking University)
- Huawei Ascend 950PR Official Benchmark Data
- Research reports from Huaxi Securities, Shanghai Securities, and others
Key verification point: the price-cut幅度 after Ascend 950 super-nodes ship at scale in H2 2026, and the feasibility of training V4 on a purely domestic cluster.
5.2 Neutral Path: A "Cold War" of Parallel Tracks
The more likely short-term outcome is coexistence between CUDA and non-CUDA ecosystems. DeepSeek's successful adaptation on Chinese chips validates an independent path, but Nvidia remains irreplaceable in the training market, especially for trillion-token generation required by large-scale RL.
In this configuration, DeepSeek's strategic value is *balance*, not *replacement*—providing the industry a second option, pressuring Nvidia's pricing power, and buying iteration time for Chinese chips. That alone is a significant strategic return.
5.3 Risk Path: Engineering Overextension and Iteration Slowdown
V4's domestic adaptation has been described by insiders as "climbing snowy mountains and crossing grasslands." The stability, memory bandwidth, and network-latency requirements of running trillion-parameter MoE on heterogeneous chip clusters are brutal. DeepSeek made a series of trade-offs: abandoning some extreme benchmark optimizations, prioritizing robustness in long-context and agent scenarios.
The larger lurking concern: when engineering teams pour effort into hardware adaptation, performance optimization on the model itself may slow. The 15-month gap between R1's breakout in January 2025 and V4's release in April 2026 saw OpenAI ship GPT-4.5 and GPT-5, and Anthropic iterate through three Claude generations—DeepSeek effectively vanished for an entire generation in the global model race.
Liang Wenfeng's statement at an investor meeting provides the answer: DeepSeek's primary goal is AGI. Hardware ecosystem is the means; AGI is the end. Large-scale RL and recursive self-improvement (RSI) require massive inference trajectory generation, and 1M-context long-horizon tasks demand sufficiently long trajectories. Without extreme hardware efficiency optimization, such training processes cannot practically run.
In other words, DeepSeek is not "distracted" by hardware adaptation—it is laying infrastructure for AGI training. The ultimate purpose of cost compression is to transform "unaffordable to burn" into "affordable to burn."
VI. Conclusion: Pricing the Possibility
Returning to the opening question: what is DeepSeek competing for?
The answer is likely not market share, not short-term revenue, but the right to define *possibility*. When it anchors million-token flagship inference at $0.003625/M, it tells the entire industry: the threshold for long-context agents is *this* number. When it migrates code from CUDA to CANN and rewrites 200+ operators in TileLang, it tells Chinese chip vendors: what you lack is not a cheaper GPU, but a model that can run on you.
Capital is not betting on an API supplier. Investors are betting that if inference cost and hardware barriers are broken through, the critical-mass moment for AI applications arrives sooner—and DeepSeek will be the player defining the ecosystem rules at that threshold.
Can Chinese chips rise on this wave? That depends on a more fundamental question: is DeepSeek-V4's successful adaptation a one-off moonshot, or a reproducible standardized path? The open-sourcing of TileLang, the release of V4 weights, and the scale deployment of Ascend super-nodes in the second half will provide the answer.
---
References and Further Reading