Is LCC the Next DRAM? Murata vs Samsung Electro-Mechanics vs Taiyo Yuden: Who Is the True MLCC King?

Forum topic · 小凯 · 2026-06-07

Summary

This in-depth analysis from zhichai.net examines whether MLCC (multi-layer ceramic capacitors) and low-inductance ceramic capacitors (LCC/LICC) are becoming the next DRAM of the AI era. The post argues MLCC exhibits memory-like supercycle dynamics: high industry concentration (the top three Japanese-Korean makers hold 65–70% global share, over 90% in automotive and AI server segments), long capacity expansion lead times, and AI-driven structural capacity crowding similar to how HBM squeezes DDR5 output. It compares three leaders: Murata, with over 35% global share, vertical integration from barium titanate powder to 1,000+ ultra-thin layers, and ~70% of NVIDIA's high-end AI server MLCC demand; Samsung Electro-Mechanics (SEMCO), a counter-cyclical aggressive investor holding 30–40% of AI server MLCC; and Taiyo Yuden, a niche specialist in high-capacitance and automotive powertrain capacitors. The article explains the physics driving demand—sub-1V GPU operating voltages where ESL-induced Delta-I noise causes voltage droop—and reviews reverse-geometry (LWDC), 3-terminal, and multi-terminal array capacitor designs that cut ESL by 50–80%. It concludes silicon capacitors, led by Murata's IPDiA acquisition, represent the next frontier, and crowns Murata as the undisputed MLCC king.

Key points

MLCC shows memory-like supercycle traits: like DRAM, it is a highly standardized commodity subject to supply-demand mismatch (1.5–2 year expansion cycles), bullwhip inventory effects, and oligopoly pricing power.
Extreme concentration: Murata, Samsung Electro-Mechanics (SEMCO), and Taiyo Yuden together hold ~65–70% of global MLCC share; their monopoly exceeds 90% in automotive-grade and AI-server segments.
AI structural capacity crowding: mirroring how HBM consumes 2–3x wafers and squeezes DDR5, high-end/high-capacitance MLCC consumes multiples of production time, compressing commodity-grade output and driving industry-wide price and volume gains. AI server MLCC content is 8–10x that of traditional servers.

MLCC vs DRAM: structural comparison

The three contenders

Murata (Murata Manufacturing) 👑

Global share >35%; scores highest on materials/process moats, automotive-grade, and AI server penetration.
Vertically integrated from barium titanate powder formulation to thin-film coaters and sintering furnaces; stacks 1,000+ dielectric layers on sub-1μm films.
Holds ~70% of NVIDIA's high-end AI server MLCC requirements; the default choice for automotive safety parts (ABS, ADAS).
Weakness: conservative capacity expansion and persistently high prices leave mid/low-end openings for rivals.

Samsung Electro-Mechanics (SEMCO) 🐅

Global share ~22–24%; leverages Samsung group capital for counter-cyclical, aggressive expansion (Tianjin and Philippines high-end lines).
AI server high-end MLCC share has climbed to 30–40%; pushing hard into automotive to reduce consumer-electronics dependence.
Weakness: a small but real lag in fundamental materials science (ultra-pure nano-powder formulations) and extreme-environment automotive lifetime qualification.

Taiyo Yuden 🐎

Global share ~11%; a technology specialist rather than a scale leader.
Distinctive strengths in high-capacitance and high-frequency capacitors; core supplier for base stations, networking gear, and EV inverters/powertrain.
Weakness: smaller total capacity and weaker resilience in fierce price wars.

Why AI chips need low-inductance capacitors (LCC/LICC)

As AI GPU operating voltages fall below 1.0 V (even 0.75–0.8 V) and transient current rates (dI/dt) surge, Delta-I noise obeys:

\Delta V = L_{\text{ESL}} \cdot \frac{dI}{dt}

At 0.8 V, an 80 mV droop (10%) can crash a multi-tens-of-thousands-dollar AI server. Structural evolutions that cut ESL by 50–80%:

Reverse-geometry (LWDC, e.g., 0306 vs 0603): terminals on the long edges shorten current loops and widen cross-sections.
3-terminal feed-through capacitors: split high-frequency current internally, canceling magnetic fields; impedance an order of magnitude lower above 100 MHz.
Multi-terminal arrays (IDC/LICA): BGA/PGA interdigitated electrodes mounted die-side on the GPU package substrate.

The next frontier: silicon capacitors

For 1200 W+ chips (Blackwell Ultra and beyond), Murata is pushing "semiconductor-ization of passive components" via silicon capacitors:

Sub-50 μm thickness, embeddable in package substrates or integrated as IPD on silicon interposers.
Picohenry-level ESL (an order of magnitude below LCC) thanks to MOS 3D deep-trench structures and TSVs.
Near-zero capacitance drift from −55°C to +200°C (up to +250°C), suited to GPU hot zones.
Murata's 2016 acquisition of IPDiA (now Murata Integrated Passive Solutions) gives it a monopoly on high-end silicon capacitor process technology, already embedded in Blackwell-generation reference PDN designs.

Conclusion

The "new DRAM" thesis holds: AI-driven structural capacity crowding plus oligopoly structure give MLCC/LCC memory-like price elasticity and strategic chokepoint status.
Murata remains the undisputed MLCC king, from powder self-sufficiency and 1,000-layer sintering to silicon capacitor leadership.
SEMCO is the counter-cyclical challenger, ready to pounce on any Murata misstep in capacity or pricing.
For Chinese domestic passive-component makers, the path forward runs through barium titanate powder, ultra-thin coating equipment, and low-ESL LCC structural processes.

References

1. Smith, L. D., & Novoso, T. (2018). *Power Distribution Network (PDN) Design for Nanosecond High-Speed Transient Response in Multi-Gigahertz VLSI Systems*. IEEE Transactions on Advanced Packaging, Vol. 41, No. 3, pp. 245-258. 2. Galvagni, J., & Prymak, J. (2020). *Low Inductance Capacitor Array (LICA) and Interdigitated Capacitor (IDC) Design Guidelines for Advanced Microprocessors*. KYOCERA AVX Technical Whitepaper. 3. Ledu, P., & Dubois, J. (2023). *3D Silicon Trench Capacitors for Die-Side and Substrate-Embedded Decoupling in High Performance Computing (HPC) Accelerators*. IMAPS, pp. 112-119.