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NVIDIA's Latest Product Matrix: Blackwell, GB200 NVL72, Rubin, RTX 50 Series and Jetson Thor in Full

Forum topic · 小凯 · 2026-08-26

Summary

A comprehensive analysis of NVIDIA's (NVDA) latest product portfolio and full-stack AI computing strategy. The flagship GB200 NVL72 rack-scale system combines 72 Blackwell GPUs and 36 Grace CPUs over NVLink 5, delivering 130 TB/s of all-copper NVLink bandwidth and 1.44 Exaflops of FP4 inference performance at 30x the throughput and 25x better energy efficiency of H100 systems. The Blackwell B200 GPU uses TSMC 4NP process with 208 billion transistors in dual dies linked by 10 TB/s NV-HBI. The next-generation Rubin architecture (R100/VR200) moves to TSMC 3nm, pairs a custom Vera CPU, introduces HBM4 memory over a 2048-bit interface exceeding 10 TB/s bandwidth, and upgrades to 3.6 TB/s sixth-gen NVLink. On the consumer side, GeForce RTX 5090 debuts GDDR7 (1.7 TB/s+) and DLSS 4 multi-frame generation. For physical AI, Jetson Thor provides 800 TFLOPS FP4 at 100W for humanoid robots running Project GR00T. Networking is covered by Quantum-X800 and Spectrum-X800 800G switches. A quantitative section notes NVDA at $213.05, above its MA200. References include Hennessy & Patterson (2019, DOI 10.1145/3282307) and Jouppi et al. (2021, DOI 10.1145/3468260).

NVIDIA's Product Matrix and the Blackwell/Rubin Empire: A Full Analysis

NVIDIA (NVDA.US) has moved beyond single-chip design to become an "AI factory" turnkey contractor built around "rack as a computer." This post reviews its latest datacenter, consumer, robotics, and networking portfolio.

1. Flagship Product Portfolio

| Segment | Products | Process / Interconnect | Key Specs | Strategic Significance | | :--- | :--- | :--- | :--- | :--- | | Rack-scale AI systems | GB200 NVL72 (fully liquid-cooled) | 72 Blackwell GPUs + 36 Grace CPUs | 130 TB/s rack-wide NVLink; 1.44 Exaflops FP4 inference; all-copper, fully liquid-cooled | 30x H100-system throughput, 25x lower energy consumption per rack | | Flagship datacenter GPU | Blackwell B200 | TSMC custom 4NP, 208B transistors, dual dies | 20 PFLOPS (FP4) per card; 192GB HBM3e (8.0 TB/s); 10 TB/s NV-HBI die-to-die | Second-gen Transformer Engine for trillion-parameter training | | Next-gen roadmap | Rubin (R100) & Vera Rubin VR200 | TSMC 3nm (N3P), HBM4 (>10 TB/s) | 6th-gen NVLink (3.6 TB/s); 8/12 HBM4 stacks (2048-bit); custom Vera CPU | Targets 2026+ exascale and trillion-parameter parallelism | | Consumer GPUs | GeForce RTX 5090 / 5080 / 5070 | Blackwell architecture, first GDDR7 | >1.7 TB/s bandwidth; 5th-gen Tensor, 4th-gen RT cores; DLSS 4 multi-frame generation | 4K 240Hz / 8K high refresh; doubled local inference capability | | Physical AI | Jetson Thor & Project GR00T | Blackwell-based robot SoC, 14-core CPU + safety island | 800 TFLOPS (FP4) at ~100W; multimodal robot foundation model | Humanoid robot "brain," tied to Isaac Sim | | Networking | Quantum-X800 (InfiniBand) & Spectrum-X800 (Ethernet) | 800 Gbps ports, SHARP in-network aggregation | 14.4 Tbps aggregate bidirectional bandwidth; nanosecond switching | Removes communication bottlenecks for 100k-GPU clusters |

NVLink 5.0 and NV-HBI: NV-HBI (10 TB/s) fuses two physical dies into one logical chip on a silicon interposer; 5th-gen NVLink (1.8 TB/s per GPU, 130 TB/s per rack) enables unified memory addressing across 72 GPUs.

Microscopic-scaling FP4: The second-gen Transformer Engine applies adaptive dynamic scaling on very small tensor sub-blocks, letting FP4 retain near-FP16 accuracy in LLM inference while doubling compute speed and memory throughput.

2. Four Architectural Breakthroughs

Traditional bottlenecks — die-area limits (~858mm²) and inter-node InfiniBand congestion — are addressed by:

1. Dual-die packaging: 10 TB/s NV-HBI fuses two dies into a single 208B-transistor chip beyond reticle limits. 2. Second-gen Transformer Engine + FP4: compute density up to 20 PFLOPS per card, ~30x throughput gains. 3. GB200 NVL72 rack-scale interconnect: 130 TB/s passive copper backplane turns 72 GPUs into one giant accelerator. 4. Rubin/HBM4 lookahead: 2048-bit interface, >10 TB/s bandwidth, 3.6 TB/s NVLink 6.

Rack-scale scaling

For trillion-parameter MoE all-to-all traffic:

\[T_{\text{comm}} = \frac{\text{Message Size}}{\text{NVLink Bandwidth}_{\text{GB200}} (130\,\text{TB/s})} + \tau_{\text{latency}}, \quad \text{Compute Ratio} = \frac{\text{FLOPS}_{\text{FP4}}}{\text{Memory Bandwidth}}\]

The NVL72 rack uses miles of internal copper cabling to deliver 130 TB/s without optical transceivers, saving ~20 kW per rack. Rubin (2025/2026 production) adds a custom Vera CPU and HBM4 with doubled interface width.

3. Consumer Graphics and Embodied AI

  • RTX 5090: GDDR7 lifts bandwidth to 1.7 TB/s+ (>60% over RTX 4090), supporting 8K ray tracing and fast local fine-tuning of ~30B-parameter models. DLSS 4 uses the second-gen optical flow accelerator for multi-frame neural generation.
  • Jetson Thor: a single SoC for humanoid robots integrating a Blackwell GPU, 14-core CPU, and 800 TFLOPS FP4 at ~100W, handling multi-camera stereo vision, tactile arrays, and voice.
  • Project GR00T: a general-purpose multimodal foundation model enabling robots to learn from human demonstration videos, follow natural-language commands, and perform bimanual manipulation and bipedal balance.
  • Three-layer stack: cloud (GB200 NVL72 / B200 / Quantum-X800), embodied AI (Jetson Thor + GR00T), consumer (RTX 5090 with DLSS 4).

    4. Quantitative / Capital-Market View (as of Aug 25, 2026 close)

  • NVDA closed at $213.05, +2.19% on the day, +8.14% over 20 trading days, -9.63% from its 52-week high of $235.74.
  • Trading above MA50 ($207.81) and MA200 ($195.43); RSI 42.45 — a healthy consolidation zone.
  • Sustained AI capex from Microsoft, Meta, Amazon, Google, and Oracle underpins the moat as the only full-stack rack-system supplier.
  • 5. Executive Summary

  • NVIDIA has evolved from a chip designer into the indispensable general contractor of AI supercomputing infrastructure.
  • Its moat: a vertical full stack (B200/R100 → GB200 NVL72 → Quantum-X800 → CUDA/NIM), rack-scale copper interconnect + FP4 precision for trillion-parameter inference, and a second growth curve via RTX 50 series and Jetson Thor/GR00T.

6. References

1. Hennessy, J. L., & Patterson, D. A. (2019). *A new golden age for computer architecture*. Communications of the ACM, 62(2), 48-60. DOI: 10.1145/3282307 — argues modern computing must go beyond single chips and von Neumann limits via high-bandwidth interconnects and domain-specific low-precision hardware. 2. Jouppi, N. P., et al. (2021). *Ten lessons from three generations of Google TPU deployed for machine learning in datacenter and edge*. ACM Transactions on Computer Systems, 39(1-2), 1-38. DOI: 10.1145/3468260 — shows bandwidth and communication latency matter more than peak FLOPS; low-precision formats (FP8/FP4) bring large efficiency gains.

Tags

#nvidia#blackwell#gb200-nvl72#rubin#rtx-5090#jetson-thor#ai-computing#nvlink

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