Mobius: Splitting the Brain into CPU and Memory — Decoupling Knowledge from Reasoning (Shanghai AI Lab)

One-line architecture: von Neumann-ize the base model. The Reasoner (Self-Attention) is the CPU — few layers, stacked, iterative computation. Memory (FFN) is RAM — a global address space with sparse activation (MoE-like block partitioning at scale) storing knowledge vectors. The hidden state is the bus and cache: the Reasoner repeatedly queries Memory and fetches knowledge for computation. The Transformer's problem is obvious in the paper's diagram: every layer carries its own private memory, and reaching the full knowledge store requires sequential message-passing layer by layer.

1. Results: Two Experiments, Don't Conflate Them

• 7B from-scratch training (TFS): matches a 7B Transformer baseline using only 62.6% of the training data — a data-efficiency result.
• Intern-S2-Mobius-35B (CPT from Qwen3.5-35B): general tasks 67.88 vs 65.05 (narrow win), AIME 2026 95.31 vs 92.08, with a near-4x end-to-end inference speedup — an inference-efficiency result.
• Parity on general tasks plus a big speedup is "same score but 4x faster"; the 62.6% data efficiency comes from a different experiment. Both claims are true, but merging them into one is retelling inflation.

2. Lineage: Native Architecturization of Three Latent-Reasoning Threads

Latent reasoning is not a new idea, and the paper's related-work section maps the lineage cleanly:

• Continuous thought: Coconut feeds the last hidden state back as input; CODI/SoftCoT distill soft thinking.
• Recurrent depth: Universal Transformer, Looped Transformer, Huginn-style recurrent depth — added hidden iterations at test time without adding tokens.
• Extra latent steps: pause tokens, Hidden Decoding, diffusion LMs.

Mobius's claim: all of these are patches on the Transformer — latents can only be attended by a few later tokens, recurrence must traverse the full stack, parallel refinement requires bolted-on mechanisms. Mobius makes three things native architectural capabilities: iteration happens within a few layers (high update frequency), latents are not bound to specific tokens, and deep layers can synchronously decode multiple tokens (drafting completes before committing to text).

Editorial Observations

First, the self-improvement stack's layering completed this week. The position statement in §5.1 is worth reading verbatim: "current Transformer architectures do not satisfy the preconditions for self-evolution — knowledge and reasoning are tightly coupled, so learning a new skill requires end-to-end training that changes both, causing catastrophic forgetting." Placed alongside this week's Cordis paper — which says reversibility is the physical precondition for an agent to modify its own harness — Mobius says decoupling is the physical precondition for a model to modify its own knowledge: same week, two layers, the same sentence. The self-improvement stack is now complete: Ornith-1.5 (weight-layer bootstrapping) → CoE (experience-layer loop) → Metan (code-layer recursion) → Cordis (reversible harness runtime layer) → Mobius (editable knowledge storage layer). Cordis solves "modifying the harness leaves no dirty state"; Mobius solves "modifying knowledge without touching reasoning" — componentization inside the model. It also adds a third sample to the "structural study of forgetting": Synapse (cognitive-level forgetting requires storing undo paths), Cordis (runtime forgetting = dispose/inverse placement), Mobius (architectural precondition for parameter-level forgetting = decoupling; catastrophic forgetting is fundamentally coupling).

Second, a midpoint in the memory-architecture spectrum. The spectrum's ends are the parameter-compression side (Metis: memory into weights) and the structure-preserving side (Synapse/CoE: memory in external graphs/trails). Mobius sits in the middle: knowledge is externalized into a shared Memory, but remains in parameter space — trainable, differentiable — an "internal externalization." Combined with a global address space and sparse activation, it effectively welds a vector database's addressability into the forward pass. The real design freedom is not binary but the orthogonal combination of storage location (in-weights / in-architecture / out-of-architecture) × addressing method (gradient / attention / graph traversal) — Synapse is "out-of-architecture × graph traversal," Mobius is "in-architecture × attention."

Third, token economics: CoT's verbosity is working memory outsourced. The essence of long reasoning chains: Transformers have no cross-layer reusable working memory, so intermediate conclusions must be materialized as tokens and fed back — using discrete output as scratch paper, every step passing through the narrow gate of vocabulary projection. Latent reasoning swaps the scratch paper for RAM: iteration runs in continuous vectors, and text is only committed at the moment of clarity, as high-information-density tokens. This is the same physics as the multimodal piece's L70-U25-G5: tokens are an expensive interface — whatever the hidden state can carry, don't spend tokens on. Inference-cost reduction thus gains a fourth route: FreeToken (software scheduling), M5 Ultra (hardware unified memory), SSP-BO (representation choice), Mobius (architectural decoupling) — the first three save money per token; this one saves the number of tokens.

Fourth, honest boundary-drawing earns credit, but the real soft spots remain. Each of the paper's three position statements (self-evolution / world models / scientific discovery) is followed by a "Nevertheless": decoupling properties for self-evolution are only "preliminary"; latent reasoning priors "may be far from sufficient" for world models; scientific discovery requires joint design "left to future validation" — a v0 paper written with the restraint of a position paper (the architecture literally names itself Mobius-v0). The genuine soft spots lie elsewhere: the 35B model came from continued pre-training of Qwen3.5-35B, so the architecture has not yet proven it can be trained from scratch at scale; the MoE route faces the same hardware-adaptation problems as FreeToken/M5 (sparse activation changes memory-access patterns, so all existing layered KV-cache optimizations must be re-examined); and under the CPT paradigm, "editable knowledge base" remains architectural potential — no knowledge-editing experiments are given, despite being the paper's biggest promissory note.

Points to watch: ① open-source progress and from-scratch large-scale training data; ② knowledge-editing / incremental learning experiments (cash-out of the §5.1 promise); ③ scaling curves for hidden-iteration count as a test-time compute knob (alignment with Huginn-style recurrent-depth test-time scaling).

--- Source: arXiv:2608.14290 (Intern-S2-Mobius Team, Shanghai AI Laboratory; full PDF close reading, all figures checked against the original). Related-work lineage — Coconut/CODI/SoftCoT, Universal/Looped Transformer, recurrent-depth, Pause/Hidden Decoding/diffusion LMs — verified against §4.1 of the paper. Please credit the source when reposting.