Surface Code Achieves Subthreshold Scaling on IBM Heron's Heavy-Hex Lattice: USC + Quantum Elements

Forum topic · 小凯 · 2026-09-21

Summary

Researchers from the University of Southern California (USC) and Quantum Elements demonstrated, in a Nature Communications paper published September 17, subthreshold scaling of the surface code on IBM's Heron-generation 156-qubit superconducting processor, whose heavy-hex honeycomb lattice is structurally incompatible with the square-grid topology the surface code assumes. The team introduced two combined techniques: a depth-minimizing fold-unfold SWAP embedding protocol using bridge ancilla qubits, and a gap-aware dynamical decoupling scheme applied during idle periods to suppress decoherence and ZZ crosstalk. Experiments ran 10 QEC cycles with 2,200 entangling gates, using 37 physical qubits at code distance d=3 and 65 qubits at anisotropic distances (3,5) and (5,3), showing logical error rates decreasing with code distance. The paper also proposed a SPAM-aware entanglement fidelity metric to separate state-preparation-and-measurement errors from logical error rates, offering a diagnostic against spurious subthreshold claims. The work validates that IBM's heavy-hex hardware route can support surface code error correction when paired with appropriate software, with limitations remaining in cycle length, anisotropic code distances, and untested logical qubit lifetime.

Surface Code Achieves Subthreshold Scaling on IBM's Heavy-Hex Lattice

A research team from the University of Southern California (USC) and Quantum Elements published a Nature Communications paper on September 17 demonstrating subthreshold surface-code scaling on real hardware: IBM's Heron-generation 156-qubit superconducting QPU.

The Problem: Surface Codes Assume Square Grids

The surface code (Bravyi, Kitaev, late 1990s) encodes logical qubits in a 2D plane guarded by stabilizer measurements, with each stabilizer built from four adjacent qubits arranged in a square lattice. IBM's Heron processors use a heavy-hex honeycomb lattice instead — each qubit has only 2–3 direct neighbors rather than 4 — because engineering long-range couplers for square connectivity is costly.

This topological mismatch means stabilizers cannot be implemented directly on heavy-hex. Connections between stabilizers require SWAP operations, which introduce errors and create idle gaps where noise (ZZ crosstalk and non-Markovian decoherence) accumulates. Whether subthreshold behavior — logical error rate decreasing exponentially with code distance d — could be cleanly demonstrated on heavy-hex remained unresolved.

The Solution: Fold-Unfold SWAP Embedding + Gap-Aware Dynamical Decoupling

The paper combines two techniques, integrated into IBM's quantum stack via Quantum Elements' Orbit Qiskit Function:

1. Fold-unfold SWAP embedding — a depth-minimizing protocol that embeds the square-lattice code into the heavy-hex lattice using "bridge ancilla qubits," minimizing circuit depth so noise accumulates less. 2. Gap-aware dynamical decoupling (DD) — pulse sequences applied specifically during idle periods to suppress decoherence and ZZ crosstalk. Lidar stated directly: "Only with the dynamical decoupling deployed via Quantum Elements Orbit could we show the expected error-suppression improvement." DD is a required component, not an optional optimization.

Experimental Results

Hardware: IBM Heron 156-qubit superconducting QPU, the largest heavy-hex chip of its generation.
Qubit counts: 37 physical qubits at d=3; 65 physical qubits at anisotropic code distances (dx, dz) = (3,5) and (5,3).
Depth: 10 QEC cycles, each with circuit depth over 140 layers, totaling 2,200 entangling gates.
Result: Logical error rate decreases with code distance — the hallmark of subthreshold scaling, verified independently by SPAM-aware entanglement fidelity (EF).

The authors warn that without advanced DD, unmitigated idle noise can falsely mimic scaling behavior — a known source of "spurious subthreshold claims" in the literature.

New Metric: SPAM-Aware Entanglement Fidelity

The paper contributes a SPAM-aware Entanglement Fidelity metric that separates state-preparation-and-measurement errors from logical error rates. Because SWAP embedding and DD make noise non-stationary across code distances on heavy-hex, traditional stationary-noise assumptions fail. The method uses an independent "no-operation" baseline measurement after each QEC round to extract the SPAM contribution. This enables fairer cross-platform comparisons and provides a diagnostic for spurious subthreshold claims.

Context and Industry Implications

IBM's route validated: Heavy-hex can reach subthreshold with proper software support, meaning IBM's hardware roadmap is not locked out of surface-code-based fault tolerance.
Cross-hardware abstraction layer competition: Quantum Elements (Orbit), NVIDIA (CUDA-Q Logical), and IBM (Qiskit Functions) are all competing to let error-correction protocols "compile once, run anywhere." This work is an early complete open example at the error-correction layer.
Complementary simulation work: In June 2026, the same USC–Quantum Elements pair published in Physical Review Letters a quantum Monte Carlo stochastic compression method simulating noisy 97-qubit surface-code circuits, forming a "simulate–experiment" closed loop.

Limitations

1. Only 10 QEC cycles demonstrated; longer-cycle (25, 50) data not published. 2. Anisotropic code distances (3,5)/(5,3) are a compromise versus isotropic distances, and results are not directly comparable. 3. Real-time decoding and total logical qubit lifetime were not measured.

Sources cited in the original post include quantumzeitgeist.com, quantumcomputingreport.com, and science.report, all dated 2026-09-17.