At the Apsara Conference (Yunqi) in Hangzhou on September 22, 2026, Alibaba revealed three pillars of its "machine intelligence era" strategy at once: a new AI chip, next-generation models, and long-term data center plans. CEO Eddie Wu (Wu Yongming) argued that machine thinking today accounts for less than 3% of human thinking, and will eventually exceed 1,000x human capacity. Under this framing: chips are the generators, models are the load, and cloud is the power grid—so all three must be built together.
The Zhenwu V900 chip: three key upgrades
The T-Head Zhenwu V900 improves on three numbers versus the Zhenwu M890 (released May 2026):
- 3x compute per chip — determines how large a model a single card can run
- 216GB memory (up from 144GB) — lets one card hold more experts in MoE architectures
- 1200GB/s interconnect bandwidth (up from 800GB/s) — keeps cluster communication unimpeded
- ~20GW at full load consumes about 175.2 billion kWh per year — roughly 1.4x Shanghai's total 2025 electricity consumption
- 1GW roughly corresponds to ~1 million H100-equivalent cards (at ~700W per card including cooling); 20GW is therefore ~20 million cards
- With the V900 at ~1,200W (FP8 full-load estimate), a fully loaded 500,000-card cluster draws ~0.6GW, so 20GW equals about 33 such clusters
The upgrade arrives four months after the M890, well ahead of expectations, reflecting hard constraints as AI models shift from dense to MoE (Mixture of Experts): each token activates only some experts, but experts must communicate. More memory fits more experts per card; more bandwidth schedules them faster. The V900 natively supports FP8 and FP4, and enters mass production in Q1 2027, deploying into Alibaba Cloud data centers. The Zhenwu series already serves over 650 enterprise customers across autonomous driving, finance, large models, embodied AI, energy, and manufacturing.
How a 500,000-card single cluster works
Chip-level strength alone is not enough; thousands of chips must act as one. This relies on T-Head's self-developed ICN Switch interconnect chip. With native memory semantics and unified memory addressing, over a thousand V900 chips can work together like a single "super chip": each card sees one unified address space instead of isolated memory, and the compiler automatically places operators without explicit data movement.
This supernode, combined with the Panmai smart NIC and Zhenyue SSD controller chips, forms the Panjiu supernode server. Alibaba Cloud's new network architecture scales this to 500,000 cards in a single cluster. The previous M890 supernode already runs models exceeding 2 trillion parameters (Qwen3.8, Kimi K3) with production-scale inference.
Qwen4 in training, targeting 5-10 trillion parameters
Qwen4 is in training. The Qwen team reports progress on recursive self-improvement (RSI), with Qwen4.5 and Qwen5 planned to reach 5-10 trillion parameters.
That is a leap of an order of magnitude: the current Qwen3 series tops out at roughly 480 billion parameters (Qwen3-Max flagship), so 5-10T is a 10-20x jump in scale, translating to roughly 100-400x training compute demand (at ~30% MFU).
Wu's "1,000x human thinking" target gets concrete here: at MiMo-V2.6 Pro's cost benchmark (~$0.13 per task), one million thinking runs cost $130,000; ten million cost $1.3 million. Such volume only works with chip and cluster scale behind it.
What 20GW by 2032 means
Alibaba Cloud plans to operate over 20GW of global data center capacity by 2032:
Agentic Cloud: agents as the cloud's "customers"
The conference also introduced the Agentic Cloud strategy, centered on the AgentCore platform and new-generation CPFS (Cloud Parallel File System) storage, which reportedly cuts AI storage costs by 69%. AgentCore abstracts task planning, state management, tool calling, code sandboxes, and multi-agent orchestration into cloud services, while CPFS addresses storage bottlenecks from agents' long sessions and high-frequency small-file I/O.
T-Head also unveiled its Yitian server CPU roadmap: Yitian 720 and 730 arrive in 2027, with the 730 built on a fully in-house CPU microarchitecture delivering up to 1.4x Yitian 710 single-core SPECint 2017/GHz performance. The later Yitian 750 supports the in-house ICN interconnect bus protocol, connecting directly to Zhenwu AI chips for low-latency CPU–AI coupling: agent task scheduling runs on CPU, model inference on AI silicon.
The three lines combined
| Dimension | Zhenwu V900 | Qwen4/4.5/5 | 2032 data centers | |---|---|---|---| | Core metric | 3x M890 per chip, 216GB, 1200GB/s | 5-10 trillion parameters | Over 20GW | | Timeline | Q1 2027 mass production | In training, future expansion | 6-year plan | | Verified | 650+ customers | Qwen3.8 Max ranks #2 open-source (Artificial Analysis v4.3, behind only MiMo-V2.6 Pro at 46) | Production from Q1 2027 |
Against the backdrop of tightening US export controls, this event marked a concentrated showcase of domestically built AI infrastructure: self-developed chips, self-developed models, and self-developed data centers pushed forward together.
*Note: diagrams in the original post (mermaid flowcharts) summarized the chip upgrades, cluster architecture, model scaling path, 20GW breakdown, and Agentic Cloud stack.*