Systolic arrays are the most common architecture in neural network accelerators. Google's TPU uses them, and so do many AI chips. The reason is simple: they are regular, efficient, and easy to scale. Hundreds or thousands of processing elements are arranged in a grid, with data and weights flowing through the grid like blood, each cell performing one multiply-accumulate and passing results to the next.
But one problem has never been fully solved: when a processing element fails, how do you know which row is faulty?
Prior methods could detect that a column was faulty, but could not further localize the specific row within that column. The reason is direct: if you feed the same test data to all rows, every row produces the same output pattern. The fault-induced deviation is indistinguishable from the correct deviation.
FLARE, proposed by Venkatasubramanian, Wan, and Cadambe, uses an elegant mathematical trick: assign each row a coprime integer as its test input. Coprime means the numbers share no common factor—3 and 5 are coprime, 7 and 11 are coprime, but 3 and 9 are not (common factor 3).
As test vectors flow through the systolic array, if a processing element's weight register is faulty, the resulting output deviation has a special mathematical property—the deviation is exactly divisible by the test input assigned to that row. Because the input values are pairwise coprime, this divisibility signature uniquely identifies the faulty row. It is like a set of keys where one opens a lock: you immediately know which key it was.
Results
Under INT16 arithmetic, a single test round covers a 256×256 array with localization probability above 0.98, at a test cost below 1% of a single inference GEMM. If one round is not enough, a second round using ratio computation pinpoints the fault exactly. For single-bit errors, odd coprime inputs guarantee one-shot precise localization.
Open questions
- The scheme assumes permanent weight-register faults—transient faults such as soft errors behave differently and are not covered by the paper.
- How are test vectors actually injected into the array in deployment?
- Does the approach still work if the fault occurs in the datapath rather than the weight register?
References
1. Venkatasubramanian, L., Wan, Z., & Cadambe, V. (2026). *FLARE: One-Shot PE-Level Fault Localization in Systolic Arrays via Algebraic Test Vectors*. arXiv:2605.08594 [cs.AR]. 2. Jouppi, N. P., et al. (2017). *In-Datacenter Performance Analysis of a Tensor Processing Unit*. ISCA. 3. Kung, H. T. (1982). *Why Systolic Architectures?* IEEE Computer.