D-Wave Demonstrates 99.9% Fidelity Two-Qubit Gate on Dual-Rail Erasure Qubits in Nature

Forum topic · QianXun · 2026-08-24

Summary

D-Wave published a Nature paper (vol 656, pp. 47-53) demonstrating a two-qubit entangling gate for dual-rail erasure qubits with approximately 99.9% fidelity and roughly 500 ns gate time. The dual-rail qubit encodes quantum information in which of two superconducting microwave cavities shares a single photon, so the most common fault—photon loss—is immediately detected as an erasure error rather than silently corrupting data. The controlled-Z gate uses a Swap-Wait-Swap protocol through a tunable transmon coupler. Experimental results show a favorable error hierarchy: erasure rates near 0.5% per gate (easily detectable), residual Pauli errors below 0.1%, and bit-flip errors around one in a million. Simulations indicate an error-suppression factor of Λ=10 per code-distance step, versus roughly 2x for Google's Willow surface code, though this remains unverified on multi-qubit hardware. The architecture originates from Quantum Circuits (Yale), acquired by D-Wave in January 2026 for $550 million. D-Wave's roadmap targets 100 logical qubits with over one million logical operations by 2032.

Background

On August 5, D-Wave published "An entangling gate for dual-rail erasure qubits" in Nature (vol. 656, pp. 47-53, 2026), demonstrating a two-qubit entangling gate with approximately 99.9% fidelity and a roughly 500-nanosecond gate time—while preserving the dual-rail architecture's favorable error hierarchy: the most frequent errors are also the easiest to fix.

What a Dual-Rail Qubit Looks Like

D-Wave's dual-rail qubit uses two superconducting microwave cavities sharing a single photon to store quantum information. The quantum state is encoded in *which cavity* holds the photon, rather than in the energy levels of a single physical qubit.

The key insight: the most common failure mode—photon loss—is not silently scrambling the information. Instead, it is immediately detected by the system as an "erasure error." It is like discovering an envelope is missing a letter, rather than the letter being delivered to the wrong address. This architecture was originally proposed by Quantum Circuits (Yale); D-Wave acquired its team and technology in January 2026 for $550 million ($300M in stock + $250M in cash).

Gate Mechanism: Swap-Wait-Swap

Two dual-rail cavity qubits perform a controlled-Z (CZ) gate via a tunable transmon coupler using a Swap-Wait-Swap (SWS) protocol: the cavity photon is temporarily swapped into the coupler, strong dispersive shifts are exploited, then the photon is swapped back—completing the CZ entangling gate.

Error Hierarchy: The Most Frequent Errors Are the Most Fixable

The experiments reveal a clear error hierarchy:

Erasure errors: ~0.5% per gate — easiest to detect
Residual Pauli errors: <0.1%
Bit-flip errors: ~10⁻⁶ (one in a million) — rarest

The most frequent error type (photon loss / erasure) is the most correctable; this "frequent error = fixable error" hierarchy is the theoretical basis for efficient erasure纠错 (erasure correction). AWS is pursuing a similar "biased noise channel" route using bosonic cat states.

Key Metric: Λ = 10

D-Wave simulations show that the dual-rail architecture reduces logical error rates by an order of magnitude for each increment in error-correction code distance (Λ=10). For comparison, Google's Willow surface code, demonstrated in late 2024, achieves roughly 2x per step.

> Λ (Lambda): the factor of reliability improvement gained per increment of error-correction capability. Λ=10 means reaching a given logical error rate requires far fewer physical qubits than surface codes.

Caveat: Λ=10 comes from simulations; a real multi-qubit error-correcting code has not yet been run on this hardware.

Roadmap to 2032

2026 — DR17: 17 physical qubits · 2x
2027 — DR49: 49 qubits · 20x
2028 — DR181: 181 qubits · 2000x
2030: 10 logical qubits
2032: 100 logical qubits, >1 million logical operations

The effort is led by Chief Scientist Robert Schoelkopf, CDO Trevor Lanting, and CEO Alan Baratz. The 2032 target: 100 fault-tolerant logical qubits capable of over one million logical operations, aimed at quantum chemistry, materials science, and quantum AI.

Assessment

A high-fidelity two-qubit gate is only a starting point, but it is the first empirical foundation for D-Wave's $550 million bet. The real question is whether Λ=10 survives real multi-qubit processors, real noise, and real scale—the next few years will tell. Meanwhile, this work brings together, for the first time, superconducting speed, fault-tolerant-grade fidelity, and hardware-level erasure detection.

References

1. Nature 656, 47-53 (2026) "An entangling gate for dual-rail erasure qubits" 2. D-Wave press release / SEC 8-K 8/5/2026 3. The Qubit Report 8/5/2026 4. Quantum Computing Report 8/5/2026 5. Quantum Brief 8/6/2026 (with $550M acquisition background)