D-Wave Demonstrates 99.9% Two-Qubit Gate for Dual-Rail Erasure Qubits in Nature
On August 5, D-Wave published "An entangling gate for dual-rail erasure qubits" in *Nature* (vol. 656, pp. 47-53, 2026), demonstrating a two-qubit entangling gate with ~99.9% fidelity and ~500 ns duration, while preserving the dual-rail architecture's core advantage: *the most frequent errors are also the easiest to fix*.
The Dual-Rail Qubit
D-Wave's dual-rail qubit uses two superconducting microwave cavities sharing a single photon to store quantum information:
- The quantum state is encoded in *which cavity* the photon occupies, rather than in the energy levels of a single physical qubit.
- The most common fault—photon loss—is immediately detected as an erasure error, instead of silently corrupting information. It's like discovering an envelope is missing a letter, rather than the letter being delivered to the wrong address.
- This architecture was pioneered by Quantum Circuits (Yale), whose team and technology D-Wave acquired in January 2026 for $550M ($300M stock + $250M cash).
- Erasure (photon loss): ~0.5% per gate — most frequent, and easiest to detect
- Residual Pauli errors: <0.1%
- Bit-flip errors: ~10⁻⁶ (one in a million) — rarest
- 2026 — DR17: 17 physical qubits, 2x error reduction
- 2027 — DR49: 49 qubits, 20x
- 2028 — DR181: 181 qubits, 2000x
- 2030: 10 logical qubits
- 2032: 100 fault-tolerant logical qubits supporting >1 million logical operations, targeting quantum chemistry, materials, and quantum AI
Gate Principle: Swap-Wait-Swap
Two dual-rail cavity qubits are coupled through a tunable transmon coupler running a Swap-Wait-Swap (SWS) protocol to implement a controlled-Z (CZ) gate: the cavity photon is temporarily swapped into the coupler, strong dispersive shifts are exploited, and the photon is swapped back.
1. Swap: photon moves from qubit A into the coupler 2. Wait: dispersive shift accumulates phase 3. Swap: photon returns to qubit B, completing the CZ entangling gate
Error Hierarchy: Frequent Errors Are Fixable
Experimental results reveal a clear error hierarchy:
This "frequent = fixable" hierarchy is the theoretical basis for efficient erasure correction. AWS is pursuing a similar biased-noise route with bosonic cat states.
Key Metric: Λ = 10
D-Wave simulations show that each increase in error-correction code distance reduces the logical error rate by an order of magnitude (Λ=10). For comparison, Google's Willow surface code (late 2024) achieves roughly 2x per step.
> Λ (Lambda): the reliability gain per added level of error correction. Λ=10 means reaching a given logical error rate with far fewer physical qubits than surface codes.
Caveat: Λ=10 comes from simulations; real multi-qubit error-correction codes have not yet been run on this hardware.
Roadmap to 2032
Led by chief scientist Robert Schoelkopf, CDO Trevor Lanting, and CEO Alan Baratz:
Assessment
A high-fidelity two-qubit gate is only a starting point, but it is the first empirical foundation for D-Wave's $550M bet. The real question is whether Λ=10 survives on real multi-qubit processors, with real noise, at real scale—coming years will tell. Meanwhile, this work is the first to combine superconducting speed, fault-tolerant-grade fidelity, and hardware-level erasure detection in one platform.
References
1. Nature 656, 47-53 (2026) "An entangling gate for dual-rail erasure qubits" 2. D-Wave press release / SEC 8-K, 8/5/2026 3. The Qubit Report, 8/5/2026 4. Quantum Computing Report, 8/5/2026 5. Quantum Brief, 8/6/2026 (with $550M acquisition background)